Dolphin SoC GDS v6.3.0 英文正式版(混合信號兼顧多層次模擬軟體)
check crack\install.txt
混合信號兼顧多層次模擬軟體，能完全符合混合模擬與邏輯訊號電路的需求。混合訊號指的是
SMASH能處理模擬或是連續時間的訊號與不連續時間的訊號，例如：邏輯(二進位 binary)或數
字(十進位 decimal)。多層次指的是SMASH並沒有被限制在某些modeling level上，即SMASH能
處理晶體管層次、閘階層次、功能層次、行為層次並與來自於模擬與邏輯的子電路加以混合模
擬。 意味著SMASH可用在任何層次上的設計作一些精確的電路修正，這表示你將能輕易處理任
何複雜性的電路。另外SMASH有強大的多語言功能，能與SPICE、Verilog-HDL、 VHDL、
ABCD(C-language)與VHDL-AMS相容，可以將模擬區塊以SPICE語法描述與數字區塊以
Verilog-HDL語法或 VHDL語法描述的設計作多層次混合信號模擬。 SMASH能快速地模擬驗證所
設計的混合信號晶片，非常適合用來解決混合信號晶片設計問題，以提供高效能的混合信號晶
片設計模擬驗證環境，減化複雜電路模擬驗證的程式，縮短晶片設計的時程。
At 90 nanometers and below, it is no longer
possible to separate design from
manufacturing, and as fabrication
technologies get smaller and die sizes
increase designers are faced with ever
larger GDSII files. From quick and easy
layout viewing to final insertions of test
structures before mask generation, via
advanced integration of Virtual Components
through socketization and patent pending
eMicroscope technology for Virtual Test,
SoC GDS integrates productivity enhancing
functionalities needed throughout the
design creation and validation chains.
Through dedicated options, SoC GDS will fit
the needs of ViC suppliers, SoC integrators
and process/product engineers. It is also
the ideal solution to complete quality
procedures for acceptance of GDSII or
OpenAccess databases as needed by chip
finishing teams, mask shops or silicon
foundries. Running under Solaris, HP-UX,
Linux and Windows, SoC GDS delivers the
same unbeatable performance across all your
development and delivery platforms.
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